3.16.58. Peripheral ID4 Register, ETMPIDR4

The ETMPIDR4 characteristics are:


Holds peripheral identification information.

Usage constraints
  • Only bits [7:0] of this register are valid and they must be used with bits [7:0] of the other Peripheral ID registers to obtain the CoreSight Peripheral ID for the PTM.

  • From PFTv1.1, accesses to this register from the coprocessor interface are unpredictable.


Available in all PTM implementations.


See the register summary in Table 3.16.

Figure 3.63 shows the ETMPIDR4 bit assignments.

Figure 3.63. ETMPIDR4 bit assignments

To view this graphic, your browser must support the SVG format. Either install a browser with native support, or install an appropriate plugin such as Adobe SVG Viewer.

Table 3.74 lists the ETMPIDR4 bit assignments.

Table 3.74. ETMPIDR4 bit assignments

BitsDescription [a]
[7:4]4KB count
[3:0]JEP106 Continuation Code

[a] See Table 3.69 for more information about the register fields.

Copyright © 1999-2002, 2004-2008, 2011 ARM. All rights reserved.ARM IHI 0035B