3.16.27. Synchronization Frequency Register, ETMSYNCFR

The ETMSYNCFR characteristics are:


Holds the trace synchronization frequency value.

Usage constraints

There are no usage constraints.


Available in all PTM implementations.


See the register summary in Table 3.16.

Figure 3.34 shows the ETMSYNCFR bit assignments, with the default value of the register.

Figure 3.34. ETMSYNCFR bit assignments

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Table 3.43 shows the ETMSYNCFR bit assignments.

Table 3.43. ETMSYNCFR bit assignments





Synchronization frequency. A PTM reset sets this field to the default value of 1024.

If you write a value of zero to this register the PTM disables the synchronization frequency counter, and does not generate periodic synchronization requests. This does not affect the other sources of periodic synchronization requests. For more information see Periodic synchronization.


The Synchronization Frequency Register must be programmed to a value greater than the size of the FIFO, or to zero.

An implementation might not implement the bottom bits of this register, because of limitations in the accuracy of the synchronization frequency. In this case, a value read from this register might be different from the value written to it.

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