3.8.4. Summary of the PTM events

Table 3.9 shows all of the registers that you can program to define PTM events. In some cases, it is implementation defined whether a register is implemented.

Table 3.9. The PTM event registers

EventRegister
LocationDescription, see
Trigger0x02Trigger Event Register, ETMTRIGGER
TraceEnable0x08TraceEnable Event Register, ETMTEEVR
Counter 1 enable0x54Counter Enable Event Registers, ETMCNTENRn
Counter 2 enable0x55
Counter 3 enable0x56
Counter 4 enable0x57
Counter 1 reload0x58Counter Reload Event Registers, ETMCNTRLDEVRn
Counter 2 reload0x59
Counter 3 reload0x5A
Counter 4 reload0x5B

Sequencer transition, state 1 to state 2

0x60

Sequencer State Transition Event Registers, ETMSQabEVR

Sequencer transition, state 2 to state 1

0x61

Sequencer transition, state 2 to state 3

0x62

Sequencer transition, state 3 to state 1

0x63

Sequencer transition, state 3 to state 2

0x64

Sequencer transition, state 1 to state 3

0x65

External output 1 event0x68External Output Event Registers, ETMEXTOUTEVRn
External output 2 event0x69
External output 3 event0x6A
External output 4 event0x6B
Timestamp event0x7ETimestamp Event Register, ETMTSEVR

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