4.11.3. Instruction synchronization

I-sync packets provide instruction synchronization. A trace decompressor uses an I-sync packet to synchronize the instruction address, instruction set state, security state, and Context ID. The PTM generates both nonperiodic and periodic I-sync packets. See Nonperiodic I-sync and Periodic I-sync.

Nonperiodic and periodic I-sync packets have the same format. See I-sync, instruction synchronization packet.

Nonperiodic I-sync

The PTM generates a nonperiodic I-sync packet every time tracing turns on. Tracing turns on for the following reasons:

The I-sync packet includes a reason code that indicates why tracing has started or re-started. See I-sync, instruction synchronization packet for more information.

In addition, an I-sync packet contains:

  • An instruction address. This is the most recently known instruction address:

    • for normal trace turn on and FIFO overflow recovery, this is the address of the most recent waypoint target or exception target

    • for debug exit, this is the address of the first instruction to be executed, and is related to the PC value while the processor was in Debug state.

  • The instruction set state, and security state, when that instruction is executed.

  • The Context ID of the instruction at the given address, if you have enabled Context ID tracing.

  • The cycle count, if you have enabled cycle-accurate tracing. This is the number of cycles from the last cycle count output up to the most recent waypoint.

Periodic I-sync

Periodic I-sync packets have the Periodic reason code. They include the address, instruction set state and security state of the target of the most recent waypoint.

If you have enabled Context ID tracing the packet includes the Context ID.

Periodic I-sync packets never include a cycle count.

The PFT architecture requires the generation of periodic I-sync packets so that a decompressor can start operating from a point some way through the generated trace stream.

A trace decompressor can use the contents of a periodic I-sync packet to confirm the address of the current instruction, and other information about the processor state when that instruction is executed. Therefore, they provide a limited form of error checking.

A VMID packet must also be output before the next branch or atom packet after an I-sync packet.

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