4.17. Jazelle state

Note

In this section, non-Jazelle state means any processor instruction set state other than Jazelle state.

When the processor is in Jazelle state it executes Java bytecodes. The PFT architecture does not support the tracing of Java bytecode execution.

If a branch into Jazelle state occurs while tracing is enabled:

While the processor is in Jazelle state, no address comparators match, but all other PTM resources behave as normal, including Context ID and VMID comparators. Instrumentation resources remain in their current state.

If TraceEnable becomes active while the processor is in Jazelle state this change is ignored and trace does not turn on. When the processor leaves Jazelle state, trace turns on if TraceEnable remains active.

When the processor leaves Jazelle state, if tracing is enabled the PTM generates an I-sync packet that indicates the address of the first instruction in non-Jazelle state. This packet is similar to normal trace turn on. If you have enabled cycle-accurate tracing then the packet includes the number of cycles between the last cycle count output and this first instruction in non-Jazelle state.

This I-sync packet is generated regardless of whether the instruction in non-Jazelle state is actually executed. For example, if an exception occurs on this instruction, the I-sync packet is generated and the exception is traced normally.

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