5.2.1. Exception occurs after a nonwaypoint instruction

If an exception occurs after the processor has successfully executed at least one nonwaypoint instruction, then the PTM:

Table 5.1 shows an example of how the PTM traces an exception in this case.

Table 5.1. Tracing an exception occurring after execution of a nonwaypoint instruction

AddressInstructionTrace, if any, with explanation
0x0F00BEQ 0x1004This waypoint is executed. The PTM traces it by generating an E atom.
0x1008ADDADD is not a waypoint instruction so the PTM does not trace anything when the ADD instruction is executed.
-IRQ occurs

The PTM upgrades the ADD at 0x1008 to a waypoint instruction and generates a waypoint update packet with the address of 0x1008 [a]. It then issues an exception branch address packet, indicating an IRQ, with a destination address of 0x0018, the IRQ vector address .

0x0018LDR PC, loads 0x3000Branch address packet with destination 0x3000. This implies an E atom. This is a normal indirect branch.
0x3000(IRQ handler)Traced normally. Depending on the instruction stream and TraceEnable configuration, the PTM might generate some packets.

[a] If the PTM is holding any assembled atoms it outputs these in an atom header before generating the waypoint update packet. This means that the trace output stream has any outstanding atoms, followed by the waypoint update packet, followed by the exception branch address packet.

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