3.7.3. Pulse and latch behavior of EmbeddedICE watchpoint comparator inputs

Correct implementation of configurable EmbeddedICE watchpoint comparator inputs requires control signals that indicate the sampling point for each input. For each input, the input is sampled at the appropriate point indicated by the control signals. The sampling depends on the value of the corresponding bit in the EmbeddedICE Behavior Control Register. When this bit is:

0

Pulse operation. When the signal is sampled HIGH, the EmbeddedICE watchpoint comparator input is asserted for a single cycle from the point where it is sampled.

1

Latch operation. The EmbeddedICE watchpoint comparator input is latched to the sampled value, and held in that state until the cycle before the next sample point.

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