3.20.3. Memory-mapped accesses, PFTv1.0 with multiple power implementations

Table 3.87 shows memory-mapped access permissions for full tracing implementations in PFTv1.0. See PTM state definitions, PFTv1.0 with multiple power implementations for the meanings of the column headings.

Table 3.87. Memory-mapped accesses

RegisterPTM state    
No Debug PowerNo Core PowerSticky State setOS Lock SetOtherwise
Trace registersErrorErrorErrorErrorOK[a], [c]
ETMLSRErrorOKOKOKOK
ETMLARErrorOKOKOKOK
ETMPDSRErrorOK[b]OK[b]OK[b]OK[b]
ETMOSLSRErrorOKOKOKOK
ETMOSLARErrorunpOK[c]OK[c]OK[c]
ETMOSSRRErrorunpunpOK[c]unp
ETMDEVID, ETMAUTHSTATUSErrorOK[c]OK[c]OK[c]OK[c]
Other ManagementErrorOK[c]OK[c]OK[c]OK[c]
Reserved TraceErrorErrorErrorErrorUNK/SBZP
Reserved ManagementErrorUNK/SBZPUNK/SBZPUNK/SBZPUNK/SBZP

[a] When ETM_PD is 1, register writes to all Trace registers except certain bits of the ETMCR might be ignored.

[b] When the CS Lock is set, reads from the ETMPDSR do not clear the Sticky State.

[c] When the CS Lock is set, these registers are WI.


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