3.21.4. Coprocessor accesses, PFTv1.1 SinglePower implementations

Table 3.91 shows coprocessor access permissions for SinglePower implementations in PFTv1.1. See PTM state definitions, PFTv1.1 SinglePower implementations for the meanings of the column headings.

Table 3.91. Coprocessor accesses

RegisterPTM state  
No PowerNon-PrivilegedOtherwise
Trace registersNPossErrorOK[a]
ETMLSRNPossErrorunp
ETMLARNPossErrorunp
ETMPDSRNPossErrorunp
ETMOSLSRNPossErrorOK
ETMOSLARNPossErrorOK
ETMOSSRRNPossErrorunp
ETMDEVID, ETMAUTHSTATUSNPossErrorOK
ETMITCTRLNPossErrorunp
Other ManagementNPossErrorunp
Reserved TraceNPossErrorUNK/SBZP
Reserved ManagementNPossErrorunp

[a] When ETM_PD is 1, register writes to all Trace registers except certain bits of the ETMCR might be ignored


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