ARM® Generic Interrupt Controller Architecture Specification: 4.2. Effect of the Security Extensions on the programmers model

4.2. Effect of the Security Extensions on the programmers model

Note

For an overview of the GIC implementation of the ARM Security Extensions, see Security Extensions support.

If the GIC implements the Security Extensions, the ICDICTR.SecurityExtn bit is RAO, see Interrupt Controller Type Register (ICDICTR).

A GIC implementation of the Security Extensions provides the following features:

Each supported interrupt is either Secure or Non-secure:
- a GIC might implement some interrupts as always Secure, or as always Non-secure
- otherwise, software configures each interrupt as Secure or Non-secure
- some aspects of interrupt handling depend on whether interrupts are Secure or Non-secure.
Accesses to the GIC registers are either Secure or Non-secure, see Processor security state and Secure and Non-secure GIC accesses.

In normal operation, Secure software accesses the GIC using only Secure accesses.

Table 4.3 shows the registers that are implemented differently as part of the Security Extensions. All registers not listed in Table 4.3 are Common registers.

Table 4.3. Registers implemented differently when the GIC includes the Security Extensions

Register	Type	See:	Effect
Distributor registers
ICDDCR	Banked	Distributor Control Register (ICDDCR)	Register is banked ^[1]
ICDICTR	Common	Interrupt Controller Type Register (ICDICTR)	Adds the LSPI field
ICDISR	Secure	Interrupt Security Registers (ICDISRn)	Register is Secure
ICDSGIR	Common	Software Generated Interrupt Register (ICDSGIR)	Adds the SATT bit
CPU interface registers
ICCICR	Banked	CPU Interface Control Register (ICCICR)	Register is banked ^[1]
ICCBPR	Banked	Binary Point Register (ICCBPR)	Register is banked ^[1]
ICCABPR	Secure	Aliased Binary Point Register (ICCABPR)	Register is Secure
^[1]Banked to provide Secure and Non-secure copies of the register, see Register banking.

The ARMv7-A and ARMv7-R Architecture Reference Manual defines the Security Extensions register types:

Banked: The device implements Secure and Non-secure copies of the register. The register bit assignments can differ in the Secure and Non-secure copies of a register. A Secure access always accesses the Secure copy of the register, and a Non-secure access always accesses the Non-secure copy.
Secure: The register is accessible only from a Secure access. The address of a Secure register is RAZ/WI to any Non-secure access.
Common: The register is accessible from both Secure and Non-Secure accesses. The access permissions of some or all fields in the register might depend on whether the access is Secure or Non-secure.

In addition, in a GIC that implements the Security Extensions, the priority range available for Non-secure interrupts is half the range available for Secure interrupts, see The effect of the Security Extensions on interrupt prioritization.

The following sections give more information about the effect of the Security Extensions on the GIC programmers model:

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