CoreSight on-chip trace and debug
Documentation set for the ARM on-chip debug and trace solution ,including the CoreSight architecture, Embedded Trace Macrocell (ETM), Program Flow Trace (PTM), and ARM Debug Interface (ADI) architectures, Trace Buffers, the Embedded Cross-Trigger, and other CoreSight components.
CoreSight on-chip debug and trace includes:
- Architecture specifications for the CoreSight Architecture, the Program Flow Trace Macrocell (PTM) and Embedded Trace Macrocell (ETM), the High Speed Serial Trace Port, and the ARM Debug Interface.
- A CoreSight Technology System Design Guide.
- CoreSight components, including the Debug Access Port (DAP), the Embedded Cross Trigger (ECT), AMBA Trace Bus (ATB) bridge and replicator, the Trace Funnel, the Trace Port Interface Unit (TPIU), the Embedded Trace Buffer (ETB), and the Instrumentation Trace Macrocell (ITM).
- Trace macrocells for ARM processors, including the CoreSight ETM9, CoreSight ETM11, CoreSight ETM-R4, and CoreSight PTM-A9
- The AMBA AHB Trace Macrocell (HTM).
- The TPIU-Lite and DAP-Lite to provide debug solutions for simple systems.
Contents
CoreSight and ETM Architecture
Trace Buffers
Embedded Trace Buffer
ETB11
CoreSight components
Cross Trigger
Trace Macrocells
CoreSight ETM9
CoreSight ETM11
CoreSight ETM-A5
Revision: r0p2
Revision: r0p1
Revision: r0p0
CoreSight ETM-R4
Revision: r2p1
Revision: r2p0
Revision: r1p0
CoreSight PTM-A9
CoreSight STM
AMBA AHB Trace Macrocell(HTM)
ETM7
ETM9
ETM10
ETM10RV
ETM11RV
Related information
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