CoreLink controllers and peripheralsCoreLink logo

ARM documentation set for ARM CoreLink controllers and peripherals, Intellectual Property (IP) macrocells for Systems-on-Chip. Includes AMBA AXI and AHB interconnect, Dynamic and Static Memory Controllers, Interrupt, Color LCD, and Cache Controllers, GPIOs, UARTs, and TrustZone peripherals.

ARM CoreLink controllers and peripherals are re-usable Intellectual Property (IP) macrocells developed to enable the rapid assembly of System-on-Chip designs.

CoreLink controllers and peripherals comply with AMBA AXI, AHB, and APB standards. They provide functionality for very high performance matrix interconnects through to simple I/O. For example:

  • Interconnect Generation
  • Memory Controllers
  • DMA Controllers
  • Level-2 Cache Controllers
  • LCD Controllers
  • Interrupt Controllers
  • GPIOs & UARTs

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